1. Field of the Invention
The present invention relates to a semiconductor memory device and a method of manufacturing a semiconductor memory device.
2. Related Art
Development of an FBC (Floating Body Cell) memory device that stores data in each FBC according to the number of a plurality of carries accumulated in a floating body of the FBC has been underway in place of a DRAM (Dynamic Random Access Memory) comprised of 1T (Transistor)-1C (Capacitor) type memory cells (Patent document 1). The FBC can dispense with the capacitor essential to an ordinary DRAM cell, so that the memory cell structure of the FBC memory device is simpler than that of the DRAM cell. The FBC is, therefore, advantageously easier to manufacture than the DRAM cell.
Generally, the FBC is constituted by a MISFET (Metal Insulator Semiconductor Field Effect Transistor) formed on an SOI (Silicon On Insulator) substrate. The SOI substrate is more expensive than an ordinary bulk-silicon substrate. Due to this, the manufacturing cost of the FBC is disadvantageously higher than the DRAM cell. Furthermore, design environment (e.g., SPICE MODEL) used for forming an LSI circuit on the bulk substrate cannot be applied to the SOI substrate as it is. Therefore, it is disadvantageously necessary to change the design environment to be suited for the SOI substrate in an LSI region other than a memory region. Moreover, high breakdown-voltage transistor characteristics and ESD (Electrostatic Discharge) characteristics of an input/output circuit or the like are often, disadvantageously deteriorated in the LSI region other than the memory region.